Design of DC/DC Switching Power Supply Management Chip (Part 2)

Chip design is a key national project, and chip design is also the key to my country’s freedom from import dependence and independence. The explanation of chip design in this article is continued from the article “Chip Design Examples, DC-DC Switching Power Management Chip Design (Part 1)”. If you haven’t read the previous chip design related content, you may wish to start reading from the previous article. |

Chip design is a key national project, and chip design is also the key to my country’s freedom from import dependence and independence. The explanation of chip design in this article is continued from the article “Chip Design Examples, DC-DC Switching Power Management Chip Design (Part 1)”. If you haven’t read the previous chip design related content, you may wish to start reading from the previous article. |

1. The design of the internal module of the chip

This purpose is to design a boost DC-DC power conversion chip based on PWM control, which implements a current mode PWM control circuit based on a dual-loop (voltage loop and current loop) first-order control system. The integrated module will include Control, drive, protection, detection circuit, etc. Finally, on the basis of the basic framework of the circuit system, combined with power Electronic technology and microelectronics technology, using BiCMOS technology, the research is specifically aimed at the realization of the DC-DC conversion circuit.

System design and system block diagram and design ideas of each functional module

Design of DC/DC Switching Power Supply Management Chip (Part 2)

Figure 1 Block diagram of system module principle

The following describes the various functional modules of the system:

① The error of the error amplifier circuit is a high-gain differential amplifier used to adjust the converter. The amplifier generates an error signal, which is supplied to the PWM comparator. An error signal is generated when the output voltage sample is compared with the internal voltage reference and the difference is amplified. The second pin Vref of the error amplifier is the fixed reference generated by the reference voltage.

② When the PWM comparator comes from the current sampling signal, it is the current signal after the compensation harmonic generated by the Inductor current and the oscillator. When the error signal exceeds the error signal, the PWM comparator flips and resets the drive latch to turn off the power switch. This is to control the switching on and off of the switch tube.

③ Oscillator module The oscillator circuit provides a clock signal of a certain frequency to set the converter operating frequency and the timing ramp wave for slope compensation. The clock waveform is a pulse, and the timing ramp wave is used for ramp compensation, which is added at the inductor sampling end.

④ Driver latch The latch includes RS flip-flop and related logic, which controls the state of the power switch by turning on and off the drive circuit. The low output level from the latch disconnects it. In the normal operating mode, the flip-flop is set to high level during the clock pulse, and the latch is reset when the output of the PWM comparator changes to high level.

⑤ Soft-start circuit module When the whole system is just started, the inductance generates a large inrush current. The soft-start prevents the system from starting at the full duty cycle at the beginning, so that the output voltage increases to the rated voltage at a controlled rise rate. point. The design idea is to use the charge and discharge of an external capacitor to slowly increase the duty cycle to achieve the purpose of stable output.

⑥ The current sampling circuit provides the slope compensation current sensitive voltage to the PWM comparator.

⑦ The protection circuit module monitors the current of the power switch. If the value exceeds the rated peak value, the circuit will act and restart the soft start cycle.

2. Several details that must be considered in the design

① About ramp compensation

This is a fundamental problem in the current-controlled switching converter mentioned above. The current control type is to connect the actual inductor current and the current value set by the voltage outer loop to the two ends of the PWM comparator for comparison, which is used to control the switching tube. The reasons for ramp compensation are analyzed below. The following diagrams are the inductor current waveform diagrams for spike current control with duty cycle greater than 50% and less than 50%.

Design of DC/DC Switching Power Supply Management Chip (Part 2)

Figure 2 Principle analysis of slope compensation

Where Ve is the current setting value output by the voltage amplifier, ΔI0 is the disturbance current, and m1 and m2 are the rising and falling slopes of the inductor current, respectively. It can be seen from the figure that when the duty cycle is less than 50%, the current error ΔI l caused by the disturbance current becomes smaller, and when the duty cycle is greater than 50%, the current error ΔI l caused by the disturbance current becomes larger. Therefore, peak current mode control when the duty cycle is greater than 50%, the disturbance signal will be enlarged after one cycle, which will cause unstable operation. At this time, it is necessary to add slope compensation to the delete comparator to stabilize the circuit. The empty ratio is less than 50%, and the circuit performance can also be improved. Therefore, slope compensation can very well increase the stability of the circuit, so that the average value of the inductor current does not change with the duty cycle, and reduce the error of the peak value and the average value. The slope compensation can also suppress sub-harmonic oscillation and ringing inductor current. I won’t go into details here. In terms of ramp compensation, the exact size of the slope of the compensation waveform must be determined. The method used is to establish a system model, derive the transfer function, and calculate the value of the compensation slope. This is a critical step.

② About soft start

The DC/DC switching power supply is prone to inrush current during the startup process, which may cause damage to the electronic system. In order to avoid excessive input current and output voltage overshoot during startup, a soft-start circuit must be used in the design. The disadvantage of this method is that when the threshold of the output voltage is not reached, the surge current phenomenon may cause the electronic system Damage, and after the output voltage reaches the threshold, the power supply may be restarted many times due to accidental overcurrent. Therefore, a cycle-to-cycle current limit threshold should be used to limit the inrush current at power-up and prevent the power supply from restarting multiple times. As shown in Figure 3:

Design of DC/DC Switching Power Supply Management Chip (Part 2)

Figure 3 Soft start circuit

The Links:   LQ121K1LG52 G173HW01-V0CELL

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