[Introduction]Onsemi recently launched a 100 W USB PD reference design, this design supports PD 3.0, PPS, the maximum output power is 100 W, the average energy efficiency at 115 VAC and 230 VAC reaches 92%, and the full load energy efficiency exceeds 92% %, the shape is only 65 mm x 65 mm x 28 mm, suitable for mobile phone fast charging, notebook computers and other applications.
Figure 1: 100 W Type-C PD Adapter Solution Outline
The solution uses NCP1623A power factor correction (PFC) controller, NCP1343 multi-mode high frequency quasi-resonant (QR) flyback PWM controller, NCP4307 synchronous rectifier controller, combined with FUSB15101 to support programmable power supply (PPS) USB Type-C PD 3.1 power controller with AC input voltage range of 90 V to 264 V and output voltage range of 3.3 V to 21 V.
Among them, NCP1623A is based on the innovative Valley Synchronous Frequency Flyback (VSFF), works in critical conduction mode (CrM) under heavy load conditions, and enters discontinuous conduction mode (DCM) under light load conditions, ensuring that it can be supplied under various loads. Extremely energy efficient. NCP1623A provides two-level output voltage: when the input is lower than 146 VAC, the output is 250 V, and when the input is higher than 163 VAC, the output is 390 V. Its follower boost capability also greatly improves the energy efficiency at low voltage. Compared with the traditional fixed output, at low voltage It can improve the PFC efficiency by 1.5~2%.
NCP1343 integrates power expansion mode (PEM), in the case of low voltage input, 20 V output, 0 to full load sudden change, can enter CCM mode before PFC does not start to reduce primary peak current, minimize transformer size and PFC output capacitance , Compared with the traditional QR controller, the primary peak current can be reduced by 25% at full load. Quiet-skip mode minimizes audible noise.
The self-powered capability and dual Vcc pin configuration options of the NCP4307 eliminate the need for an external Vcc circuit at low output, and can also be configured for high-side or low-side operation.
Figure 2: Circuit schematic (PFC part)
Figure 3: Circuit schematic (PWM and protocol part)
Increasing the operating frequency reduces the size of the power supply, and the design operates at 190 KHz at 264 VAC, full load, and also drives Gallium Nitride (GaN) to further increase the switching frequency and reduce losses.
In addition to the advantages of high energy efficiency and small form factor, the 100 W USB PD reference design also integrates rich protection functions, including over voltage protection (OVP), over current protection (OCP), short circuit protection (SCP), open loop protection, etc., providing High reliability.
Energy efficiency test
We tested the average energy efficiency and light load (10% load) energy efficiency of the 100 W USB PD adapter reference design at 115 VAC (blue curve) and 230 VAC (red curve) input voltage, as can be seen from the graph below Above the COC V5 Tier 2 average energy efficiency standard and the COC V5 Tier 2 light load energy efficiency standard (purple curve), the standby power consumption over the entire load range is less than 70 mW.
Figure 4: Average energy efficiency and 10% load energy efficiency far exceed COC V5 Tier standards
Performance Testing
The 100 W USB PD adapter reference design has been tested with less than 60 mV ripple and noise under various load conditions, stable dynamic performance, and excellent EMI and thermal performance.
Figure 5: Ripple at 90 VAC for 100 W USB PD Adapter Reference Design
Figure 6: 100 W USB PD Adapter Reference Design Thermal Imaging
Summarize
The energy efficiency of the 100 W USB PD reference design far exceeds the COC V5 Tier 2 standard, and has high power density and high reliability. Significant advantages include: using a 2-stage PFC output to improve energy efficiency at low voltage; when the PFC starts to work at a certain power , the Power Expansion Mode (PEM) controller supports conversion to higher power; compared to the QR controller, only 68 uF PFC output capacitor is required, thereby minimizing capacitor size and reducing cost.
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